Announcement List

PHD PROGRAMME

The department has four full time PhD faculty members and currently eight more are at different stages of their PhD research .Since its inception the department has produced three PhD graduates.

HEC Approved PhD Supervisors:

  • Dr.–Ing. Shehzad Hasan
  • Dr. Muhammad Ali Ismail
  • Dr. Muhammad Khurram

PhD Scholars:

Researcher: Maria Waqas

Title: Modeling, Analysis and Fabrication of Neural Gene Regulatory Mechanisms

Supervisor: Dr. Muhammad Khurram

Research Summary

The major objective of this research project is the mapping of Neural Gene Regulatory Mechanisms into electronic domain. It focuses on finding and implementing on an IC chip, an appropriate model that can closely represent the dynamics of a Neural Gene Regulatory Network. The process involves study, analysis and enhancement if required of the existing mathematical and computational models of GRNs. Once finalized, the model will be worked upon for realization on IC chip level. Such hardware can form an excellent example of self-organizing and evolutionary hardware and can lead to extraordinary improvements in the field of computational mechanics. It can also help in the study of cognitive sciences as well as understanding of brain functions.
Study and modeling of Gene Regulatory Network (GRN) is an emerging trend in the field of biosciences as well as engineering. The concept belongs to a multidisciplinary field of study called Computational Biology.

Researcher: Zareen Sadiq

Title: Memristive Processor

Supervisor:Dr.-Ing. Shehzad Hasan

Research Summary

This research focusses on the design of a memristor-based processor. Memristor – as the name suggests - is a non-volatile, programmable memory resistor which was discovered in 1970 by Leon Chua, physically modelled by HP Labs in 2008 but not yet available as an off-the-shelf component. The memristor- with its capability to remember the last resistance state- if integrated in the circuits of the processor would lead to a great increase in speed and a drastic decrease in power consumption of computing hardware. The research attempts to design components of the computer’s processor such as the Arithmetic and Logic Unit and Control Unit using memristor–based circuits. This research involves the making of an emulation model of the working of the memristor and then testing for its correction. Redesigning of the memristor based processor’s components’ circuitry, along with simulation models for verifying and observing the performance benefits in terms of time and space complexity is the task that this research aims at.
This research shall help in building energy efficient computing machines which are inevitable for ensuring that in future, the skyrocketing energy costs will not hamper Internet growth and the enormous web-based economy that depends on it.

Researcher: Saad Qasim Khan

Title: Neuromorphic Electronic Hardware

Supervisor: Dr. Muhammad Khurram

Research Summary

Neuromorphic Hardware was the term first coined by Carver Mead in late 1980`s. Neuromorphic Hardware means how we can employ population of Artificial Silicon Neuron (ASN) on circuit level design and how this population of ASNs can be efficiently utilized for desirable computation. Concept of an artificial neuron dates back to 1943 when McCulloch-Pitt introduces their model as a circuit that mimics the function of a neuron (fundamental unit of Neural network). Unfortunately all the implementations of Artificial Neural Network after this very first model (Multilayer Perceptron-MLP, Self Organizing Map- SOM network and Feed Forward Network-FFN) despite of their parallel architecture forced to execute on a sequential machine. Last decade has witnessed a shift of the emphasis in the artificial neural network community toward spiking neural networks. Motivated by biological discoveries, many studies consider pulse-coupled neural networks with spike-timing as an essential component in information processing by the brain. The major aims attainable through this project are listed as under;

  • Design of a neuron model on electronic circuit level.
  • Implementation of a reconfigurable neural network at circuit level.
  • Implementation of possible computational technique on the hardware obtained from above mentioned point no 2.
  • Design of a system that have parallel computation capability based on Neuromorphic hardware.
Current implementations of Neuromorphic Hardware employs integrate and fire (I&F) neurons. I&F neurons are simple in their implementation on circuit level and also computationally efficient but they lack the rich firing mechanism. The rich firing mechanism exhibited by a biological neuron makes it more dynamical and complex system as compared to the model envisioned by the designers of I&F neurons. New models of spiking neurons have emerged that mimics the firing mechanism of biological neurons. These models can be utilized as neuron model in the Neuromorphic Hardware that will be superior in capability as compared to its counterpart based on I&F neurons.

Researcher: Syed Zaffar Qasim

Title:Scalability Improvement for Multi-objective Optimization Problems

Supervisor: Dr Muhammad Ali Ismail

Research Summary

In many applications of business and engineering, multiple and often conflicting objectives need to be optimized at the same time. For a computer engineer, the placing of more electronic components on a chip while minimizing that chip area and/or power loss are conflicting objectives. The overall benefit usually gained with Multi-objective Optimization (MO) is the achieving of most valuable outcome for the organization as a whole along with due consideration of the requirements of all stakeholders.
To further arouse interest, it is noteworthy that MO Problems (MOPs) are more challenging to solve, compared to Single-objective Optimization, because they have no unique solution; rather, there is a set of acceptable trade-off optimal solutions. However in the last two decades, two advances have made it possible to solve such problems in a better way. The first is a large increase in computing power. The second is the development of intelligent meta-heuristics (or evolutionary) algorithms for solving such models. An important goal of Multi-objective Evolutionary Algorithms (MOEAs) has been to achieve convergence to the true Pareto-optimal solutions along with a wide diversity among the solutions.
Although the current state-of-the-art MOEAs have been proved quite efficient for solving two and three objective problems, the performance of these algorithms is unsatisfactory in solving many-objective problems. Many-objective problems are the MOPs with more than three or four objectives. For instance, Software Refactoring problem typically needs the optimization of around 15 distinct quality metrics. Hence the main objective of this research study will be to improve the prevailing techniques for solving many-objective problems. The main beneficiaries of the work will be the engineering, health care and other domains of prime importance for the economic growth and prosperity of any nation.

PhD Students:

  • Muhammad Faraz Hyder
  • Mr. Salman Jaffery
  • Mr. Mustafa Latif