Dr.–Ing. Shehzad Hasan


Chairman/Associate Professor

SHasan
  • PhD (VLSI Testing), University of Bremen (Germany)
  • M.Engg (Computer Systems)
  • BE (Computer Systems)
  • HEC Approved PhD Supervisor


  • shasan@neduet.edu.pk

Dr. -Ing. Shehzad Hasan received his PhD from University of Bremen, Germany. He did his Bachelor & Master of engineering in Computer Systems from NED University, Karachi in 2003 & 2006 respectively.

Teaching Experience

He has more than 8 years of teaching experience. He has taught the following courses in graduate and undergraduate degree programmes.

  • Computer Architecture and Organization (2004 – 2006)

  • Microprocessor & Assembly Language (2003, 2006)

  • Microprocessor Based System Design

  • Fault Diagnosis and Reliable System Design

  • Diagnosis and Design of Reliable Digital Systems

Research Interests/Activities

His research interests include but are not limited to

  • Crosstalk noise analysis

  • Crosstalk test pattern generation & test set compaction

  • Diagnosis of crosstalk induced glitch and delay faults

Awards & Honors

  • Maintained a CGPA of 4.0 in his postgraduate engineering education.

  • Received DAAD scholarship in 2007.

    Publications

  • Shehzad Hasan, A. K. Palit, W. Anheier, "Fault Diagnosis of Crosstalk Induced Glitches and Delay Faults", 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, 14th – 16th April 2010, Vienna, Austria.


  • Shehzad Hasan, A. K. Palit, W. Anheier, "Test Pattern Generation and Compaction for Crosstalk Induced Glitches and Delay Faults", 23rd International Conference on VLSI Design, VLSI 2010, 3rd – 7th January 2010, Bangalore, India.


  • A. K. Palit, Shehzad Hasan, W. Anheier, "Decoupled Victim Model for the Analysis of Crosstalk Noise between On-chip Coupled Interconnects", 11th Electronics Packaging Technology Conference, EPTC 2009, 9th – 11th December 2009, Singapore.


  • Shehzad Hasan, A. K. Palit, W. Anheier, "Equivalent Victim Model of the Coupled Interconnects for Simulating Crosstalk Induced Glitches and Delays ", 13th IEEE workshop on Signal Propagation on Interconnects, SPI 2009, 12th – 15th May 2009, Strasbourg, France.


  • Shehzad Hasan, A. K. Palit, K.K. Duganapalli, W. Anheier, "Compaction of Test Set for Crosstalk Induced Glitch Faults using Pattern Sequencing", 21. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, TuZ 2009, 15th – 17th February 2009, Bremen, Germany.


  • A. K. Palit, Shehzad Hasan, K.K. Duganapalli, W. Anheier, "Distributed RLGC Transient Model of Coupled Interconnects in DSM Chips for Crosstalk Noise Simulation", 2nd Electronics Sytem-Integration Technology Conference, ESTC 2008, 1st – 4th September 2008, Greenwich, London.


  • Shehzad Hasan, "Test Pattern Generation and Compaction for Crosstalk Induced Glitch Faults", 14th IEEE European Test Symposium, ETS 2009, PhD Forum, 25th – 29th May 2009, Seville, Spain.


  • Shehzad Hasan, A. K. Palit, W. Anheier, "Crosstalk Glitch Fault ATPG with Test Compaction", Design Automation and Test in Europe, DATE 2009, U-Booth, 20th – 24th April 2009, Nice, France.


  • Shehzad Hasan, A. K. Palit, K.K. Duganapalli, W. Anheier, "Test Compaction of Crosstalk Faults through Fault List Reordering", Design Automation and Test in Europe, DATE 2008 University Booth, 10th – 14th March 2008, Munich, Germany.